Integrated circuits (ICs) are fabricated en masse on silicon wafers using well-known photolithography, etching, deposition, and polishing techniques. These techniques are used to define the size and shape of components and interconnects within a given layer of material deposited on a wafer. The IC is essentially built-up using a multitude of interconnecting layers, one formed on top of another. Because the layers interconnect, a need arises for ensuring that the patterns on adjacent layers of the wafer are accurately formed. Conventional methods rely heavily on accurate alignment of the wafer, using targets, to ensure accurate formation of circuit patterns on the wafer.
Referring now to prior art FIG. 1A, a detail view of a conventional alignment target, formed in a wafer 100a is shown. Alignment target 104 is shown in a cross-section view of a wafer, with its length running perpendicular to the X-Z plane shown, to form a rectangular bar shape. Layer of oxide 106 is located above a substrate 102. A trench in layer of oxide 106 is filled with a material, e.g. tungsten, to form target 104. The tungsten material is polished down, using Chemical Mechanical Polishing (CMP) methods and apparatus, to leave just the tungsten material in the trench to act as target 104.
Due to the mechanical nature of the CMP method, apparatus and materials, the top surface 112 of target 104 can have residue buildup 110a in a corner of trench 104. The direction of pad rotation for the CMP operation is shown by direction arrow 111. Frequently, the residue buildup 110a cannot be removed from the trench 104. Hence, it becomes trapped under the subsequent layer of material 108, typically metal, deposited onto the wafer. A photoresist layer 116 is deposited on top of layer 108. A pattern is typically exposed on the photoresist layer 116.
However, to locate the pattern accurately, the target location is acquired by reading a reflected signal from the edges 114a and 114b formed by the concave surface 112 of the trench 104 in the wafer 100a. Unfortunately, the trapped residue 110a frequently creates an irregular surface 114a in the subsequent layer of material 108 deposited on it in an area proximate to the trapped residue 110a. The surface irregularity 114a subsequently skews the signal, reflected from the surface of layer 108, used to detect the center of the target. The skewed signal consequently misrepresents the actual location of the target on the wafer, thus mislocating subsequently created patterns, e.g. ICs, formed on the wafer. This mislocation can cause poor wafer yield or can cause subsequent product failures. Consequently, a need arises for an apparatus and a method that will accurately locate the target on a wafer regardless of the flatness of the target surface.
A recent development in conventional CMP operations is a change from ferrous nitrate material to potassium iodate material for the abrasive slurry. However, potassium iodate does not possess some of the benefits of ferrous nitrate. That is, while potassium iodate leaves less residue on the target, it actually makes corners 110a and 110b of target 104 more asymmetric. Consequently, when using potassium iodate the asymmetry of surface 112, edges 11oa and 110b, and edges 114a and 114b, would be worse than those created using ferrous nitrate polishing material.
Referring now to prior art FIG. 1B, a graph showing a conventional return signal with a conventional minima used to determine a centroid of a wafer target is shown. Graph 100d has an ordinate of intensity of returned signal 120 and a location 122 of the wafer or target from where the signal is received. Specifically, area 134 of return signal 124 is associated with a return signal that was reflected from surface 112 and corners 114a and 114b of metal layer 108 above target 104 in wafer 100a. Area 135 arises from a duplicate target formed in wafer, e.g. an unshown target that would be parallel to target 104 in prior art FIG. 1A. Conventionally, a minima of the target is determined by a slope of the signal arising from non-flat surface and corners 114a and 114b of metal layer 108 above target 104, as shown in prior art FIG. 1A. However, slope 1141 and slope 2142 of return signal 124 are not symmetrical in prior art FIG. 1B. This is due to the fact that reflected signal 124 from one edge, e.g. edge 114a, is different than the reflected signal from another edge, e.g. edge 114b, of the surface of the layer of material 108 located above target 104. This unsymmetrical signal is due to the asymmetry between edges 114a and 114b, and due to the roughness of edge 114a. Again, this asymmetry is exacerbated by the new potassium iodate material used in the CMP process.
As a result of the poor quality of the return signal 124 from two targets, the location of the center of the individual targets, e.g. as determined by minima 1 (MIN 1) 131 and minima 2 (MIN 2) 132 is inaccurate. Consequently, the centroid 108 of the target pattern, determined by location of the centers of the individual targets, is frequently mislocated. Given the close tolerances of conventional and future Integrated Circuit (IC) designs, the mislocation of the target is unacceptable. Consequently, a need arises for an apparatus and a method that will accurately locate the target on a wafer regardless of the asymmetry of the target surface.
The width 113a of the target 104 formed in layer 106 using conventional methods and apparatus effectively becomes narrower on subsequent layer of material. Thus, in layer 108, a width 113b of target is actually narrower than the original width 113a. For example, if width 113a is 4 microns (μ) then width 113 would be on the order of approximately 2μ. With a target this small, conventional stepper apparatus and software is frequently unable to even acquire the target. If the target cannot be acquired, then further processing steps may not be feasible, because the stepper is essentially blind to the position of the wafer. Thus, the wafer becomes useless and is typically scrapped. Consequently, a need arises for a method and apparatus with increased target acquisition rate, using either a conventional or a modified target.
Because the conventional targets are designed to have relatively long and straight edges, the CMP operation can significantly affect the symmetry and shape of the edges of the target. Additionally, because the conventional location method depends upon the reflected signal from the edges of the target, it is substantially dependent upon the condition of the edges of the target. Consequently, a need arises for a target design that is immune from the asymmetry and non-flat surfaces likely to arise in conventional CMP processes.
In summary, a need arises for ensuring that patterns on adjacent layers of the wafer are accurately formed. To satisfy this need, a need arises for an apparatus and a method that will accurately locate a target on a wafer regardless of the flatness of the target surface. Additionally, a need arises for an apparatus and a method that will accurately locate the target on a wafer regardless of the asymmetry of the target surface. Another need arises for a method and apparatus with an increased target acquisition rate, using either a conventional or a modified target. Lastly, a need arises for a target design that is immune from the asymmetry and non-flat surfaces likely to arise in conventional CMP processes.